Copenhagen, September 12th, 2013

 

FPGAworld

 

08:30 – 09:00

Registration

09:00 – 09:15

Conference opening

Lennart Lindh, FPGAworld

Lars Dittmann, Technical University of Denmark

09:15 – 10:00

Key Note Session

Programmable Platform – The Cornerstone of Verification

Jonas Nilsson, Synopsys, USA

Session Chair: Lars Dittmann, Technical University of Denmark

10:00 – 10:30

Coffee&Tea Break

Sponsored by DTU, Technical University of Denmark

DTU

10:30 – 12:00

Product Program, C1-3

Session Chair: Tryggve Mathiesen, InformASIC

C1: A practical guidance towards more advanced verification using Coverage and OVL
Rick Stroot, Senior Application Engineer, InnoFour, Netherlands
INFO

C2: Introducing a New Level of FPGA Security
Peter Trott Sr. FAE, Microisemi

INFO

 

C3: Introducing the world’s highest density FPGA built using Intel’s 22nm FinFET technology

Les MacInnes, Achronix

INFO

 

12:00 – 12:30

Short Lunch Break & Exhibition

Sponsored by DTU, Technical University of Denmark

DTU

12:30 – 13:15

Key Note Session

FPGAs – Past, present, and Future. Notes from the past 25 years

Mike Dini, Dini Group, USA

Session Chair: Lennart Lindh, FPGAworld

13:15 – 14:30

Industrial and student/hackers program, A1-3
Session Chair: Rolf Sylvester-Hvid, Aktuel Elektronik

 

A1: Software-driven FPGA Systems On Chip Design Methodology
Tryggve Mathiesen, CTO Informasic AB, Sweden

INFO

 

A2: Designing an ADSB radio by means of SoC (ZYNQ) arhitecture

Marco Aiello, SESM, Italy

INFO

 

Student/Hackers:

A3 (15 min): FPGA MD5 Password Cracker

Johan Granath, AGSTU School of Higher Vocational Education, Sweden

INFO

 

14:30 – 15:00

Coffee Break

Sponsored by DTU, Technical University of Denmark

DTU

15:00 – 17:00

Academic Program, B1-4

Optimization/Design Examples

Session Chair: Lars Dittmann, Technical University of Denmark

 

Abstracts

 

B1:  Teaching System-on-Chip design with FPGAs

Erno Salminen, Timo D. Hämäläinen - Tampere University of Technology, Finland

 

B2:  Fast and Energy Efficient AdaBoost Classifier

Filip Kadlcek, Otto Fucík - FIT Brno University of Technology, Czech Republic

 

B3:  High performance 3-Dimensional Heterogeneous Tree-based FPGA Architectures

Vinod Pangracious, Umer Farooq, Zied Marrakchi, Habib Mehrez - LIP6 / University Pierre and Marie Curie Paris VI, Paris France

 

B4: Resource efficient implementation of a 10Gb/s radio receiver baseband in FPGA

Christer Svensson, Zhongxia He, Herbert Zirath, Lei Bao, Jingjing Chen - Linköping University, Sweden

 

17:00 –

Go Home Drink

 

 

 

SPONSORS

DTUACMElektroniktidningenAktuell ElektronikÅF

 

Exhibitors and Product Presenters

ÅF, Sweden, Synopsys, USA, InnoFour, Netherlands, More Electronics, Denmark, Tabula, USA, Achronix, USA, HDL Works, Netherlands, Dini Group, USA, Silica, Denmark, Sigasi, Belgium, Mathworks, USA, ELSIP, Sweden, Avnet-Memec, DTU, Denmark, Bitvis, Norway, Aktuell Elektronik, Denmark, Elektronik Tidningen, Sweden, AGSTU, Sweden

 

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